FOR IMMEDIATE RELEASE
Advanced Architectures
Release of Revision 2.0 of the A2B Synchronous System Bus
August 21, 2001 -- A2 introduces revision 2.0 of the A2B Synchronous System Bus.
A2's configurable system bus receives is first full revision to
enhance the arbitration facilities and allow smoother integration of
user-defined fields to ensure the optimal usage of the bus structures.
Irvine, CA, August 21st., 2001 - Advanced Architectures (A2), will today announce
the latest version of its A2B Synchronous System Bus architecture. The key benefits of the
new release include enhanced arbitration facilities to allow user
selection of a variety of arbitration schemes. New library
extensions are also in the new release; these include multiprocessor
support with customizable cache coherency schemes and atomic
multiprocessor communication commands. To enhance DSP operations
that often fetch data from non-contiguous memory locations an address
burst mode is now available to allow complex addressing patterns to fetch
bursts of data over the bus.
For More Information Contact:
Advanced Architectures
Irvine California USA
Tel: 949 412 3486
FAX: 949 856 3034
Internet: info@a-2.com
